Convergence of 3D integration and silicon photonics

IRT Nanoelec recently held its second meeting on silicon photonics and 3D technology. Speakers and participants got a chance to discuss their take on the market, technology, and applications for silicon photonics using 3D integration tools.


Eric Mounier of Yole presented his viewpoint of markets and applications for silicon photonics, noting that the needs for HPC and data centers are well-identified. Packaging remains a major obstacle to chip-level integration of photonics.

At Leti, tomorrow’s silicon photonics circuits will be developed using 3D integration (silicon interposers, microbumps, Cu pillars, and TSV technologies).

Mentor Graphics is currently working actively to come up with design solutions that meet the unique needs of 2.5 integration (silicon photonic interposer) and 3D architectures. Heat is a crucial issue, and one that the models do factor in.

F. Vincent of HPEnterprise then talked about the company’s interest in developing optical photonic switches for data server applications; the solution delivers benefits like lower power consumption and more flexible data transmission.

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