A 100 kW motor inverter
For the purposes of the European H2020 ModulED project, CEA has studied and built an inverter based on GaN/Si HEMT switches designed to supply a 6-phase motor with a peak power of 100 kW, which also entails switching 160 amperes in steady-state conditions. The design, production and testing of the inverter power boards helped develop expertise in terms of the design stream for the GaN power boards and paralleling of GaN/Si switches in the particularly demanding environment of electrical vehicle applications. Thanks to Nanoelec, teams from Siemens EDA and CEA are developing a digital twin of the moduled power board. Simulations are carried out with various digital design tools. They are compared with experimental data. read more on “ModulED: Modular Electrical Drivetrains“.
Exascale computing
Mont Blanc 2020 is a collaborative H2020 project which aims to define the architecture of a SoC (Silicon On Chip) processor in order to build a European low-consumption exascale machine by 2022 for high-performance computing. With the support of Nanoelec, CEA is contributing to the project by providing real applications linked to the use of HPC infrastructure, the supply of various IP (communication, consumption management) and the final demonstration thanks to its hardware emulation infrastructure. The other French contributors are Kalray [1] and Bull, responsible for project coordination. Read more about “Mont-Blanc 2020, European scalable, modular and power efficient HPC processor“.
[1] French Deeptech resulting from a CEA spin-off which aims to make its mark with smart processors, a crucial technology for the data center, automotive, robotics, embedded AI and 5G markets
Cytometry
CEA-Leti and Prophesee, both partners in the Nanoelec consortium, are taking part in the Neoteric project. Neoteric partners aim to develop a reconfigurable photonic circuit to detect cancer cells in a solution. Cytometry is a technique for the qualitative and quantitative counting and characterization of particles, molecules or biological cells in a fluid. Neoteric consists in demonstrating that a photonic circuit with learning functions (AI) can better perform image recognition of counted particles. Compared to conventional image analysis using deep learning software, silicon photonic technology promises an increase in frame rate, improved classification performance and lower energy consumption by several orders of magnitude. Read more about “Neoteric. Neuromorphic Reconfigurable integrated photonic Circuits as Artificial Image Processor“.
Transceivers
The Masstart EU project will lead to the production of several Datacom and Telecom demonstrators. It is focused on the development of advanced packaging and test methods for producing very high speed transceivers (800 Gbps and 1.6 Tbps), with reduced form factors (COBO type). CEA-Leti and Almae, partners in the Nanoelec consortium, are contributing to this project. A first generation of circuits was produced using the Silphide Design Kit developed within Nanoelec, and used by the partner Bright Photonics in its Nazca tool. Read more about “Masstart: assembly and characterization of high speed photonic transceivers“.
Packaging optoelectronic components
The purpose of Pixapp, standing for Photonic Integrated Circuit Assembly and Packaging Pilot line, is to set up
a European platform for packaging photonic components. It brings together 18 partners comprising photonic
on silicon components manufacturers, component assembly specialists, systems assemblers, and players in the reliability field. Within Nanoelec, CEA-Leti is also a contributor. It focuses on demonstration of a self-assembly technique for micro-lenses on photonic on silicon components, in order to relax the optical alignment constraints between chips and fiber connectors, by shifting constraints to the precision of the photolithographic techniques. This packaging technological building block is generic and could be used for many applications. read more about “Pixapp: Photonic Integrated Circuit Assembly and Packaging Pilot line“.