The CEA, STMicroelectronics, and the University of Toronto signed a partnership agreement stemming from their involvement in IRT Nanoelec. The agreement covers the joint development of a 56 Gbaud PAM4 transceiver that will integrate electronic and photonic chips connected with copper micro-pillars. The planned R&D includes building a complete electronic chip with modulator driver, transimpedance amplifier, and several internal testing functions. It also includes building a photonic chip with an optical modulator and very-high-speed photodetector. The partners will work together to design the two components to ensure optimal interfacing and reach the required levels of performance. The goal is to successfully demonstrate speeds of 100 Gbit/s over a single wavelength—a crucial step toward the development of 400 Gbit/s transceivers for the future IEE 802 Ethernet standard.
