IRT Nanoelec attended ECTC 2016 held in Las Vegas from May 31 to June 3, 2016.
ECTC is a major international IEEE event focusing on packaging. This year’s conference brought in 1,455 attendees.
The event provided an excellent opportunity to present the early results of research conducted on our InTact demonstrator for HPC and high-density imagers.
We also presented the results of our work on 20µ-pitch chip-to-chip interconnects placed on an interposer (research at the global state of the art) with 10µ-diameter middle TSVs.
Our industrial partners SET and EVG (founding partners of IRT Nanoelec) were also at the event, exhibiting at their own booths. They too benefitted from opportunities to showcase their 3D integration equipment.
Marie-Noëlle Semeria, Chair of the IRT Nanoelec Steering Committee, participated in a panel talk on alternatives to CMOS, getting a chance to talk about our interposer research and what it means for HPC applications.
